********************************* * System 99 Users Group (SNUG) * * HARDWARE HELP FILE * ***************************** Version: 07.09.2000 Contributors: Michael Becker Bob Carmany Jacques Groslouis Tony Knerr Bill Sullivan Mike Wright Compiled By: Dan H. Eicher Contents: 1. Overview of SNUG cards. 2. My GPL BANKS. 3. Calls added by SNUG cards (Quicklist - non-inclusive). 4. My SCSI directory Structure. 5. Bob Carmany's CRU configuration (with comments by Michael Becker). 6. Essential software to have for each cards. 7. ASCSI 8. HSGPL Questions. 9. SGCPU " 10. EVPC " 11. HRD-16 " 12. BWG " 13. SPVMC " 14. HSGPL Manual. (Translation by:Ralph Gassmann ) XX. Who is this Michael Becker guy? XX+1. Who is Harald Glaab? Explanation of files purpose: After getting a bonus at work I decided to buy a complete SNUG (System Ninety Niners Users Group) hardware system. The reason I decided to do this, was that I had seen SNUG/Michael Becker produced cards before and they are built to the highest levels of quality, they also include many unique features that stretch the TI as designed by TI to there fullest extent. Unfortunately for me, all the other users that could teach me about these cards were in Europe and all the documentation was in German, so after six months of pestering and questioning Michael and other knowledgeable users I have gathered up all the questions into this hardware help guide, hopefully as a quick reference for other TI users and freeing Michael from answer the same questions over and over! 1. Over view of SNUG produced cards. The cards produced by SNUG (System Ninety-Nine Users Group): BwG Diskette Controller: (1990) Similar to the Corcomp Diskcontroller, but includes a battery backed up clock and true time and date stamping! Uses a WD1773 disk controller and a MM58274 Real Time Clock (RTC). Note: The DSR for this card was updated in 1999 by Harold Glaab. EVPC: (1994) Enhanced Video Processor Card. Similar to the Digit Card, but with all the quirks removed, this card also moves the source chip out of the TI console and into the PBOX. Uses a Yamaha 9938 and an 8 bit colour pallete. The Digit card uses a 6 bit colour palette. HSGPL: (1995) High Speed GPL card, supports all 16 banks for Review Module library, has two additional RAM/GRAM banks (they maybe mapped as Bank 0 and 1). All banks and the DSR is made with FLASH Memory (in system program- mable! with a special programs/DSRLoader). Supports MBX modules (with the special MBX banking scheme) and has 4 ROMBanking for ROM6. SGCPU: (1996) Second Generation CPU, the TI99/4a in the BOX, also called TI99/4P (for "P"eriBox) has TMS9900 CPU, ROM0, ROM4 (a DSR onboard) and up to 1 MEG of AMS memory, all on the 16 bit bus). The keyboard supports MF2 keyboards, AT style with mode3 support. Note: EVPC and HSGPL may be used stand alone with the TI console, or in combination. But the SGCPU needs both, the EVPC for Video and Sound output, and the HSGPL for the module port. ASCSI: (1997) Advanced SCSI licensed clone of Western Horizon Technology SCSI card, made with a big PLD, Flash Memory DSR and a second SCSI connector (Apple DB25). Termination power is fused. Now upgraded to ASCSI2 (not SCSI2!) for PDMAMode or BlockmodeDMA. HRD-16: (1998) High Speed RAMDSR. Banked DSRCard in 8 or 16bits (16bits with SGCPU, and special cable (provided)). Up to 3 Megabytes of Ram, battery backed up. May be configured as bank switched DSR ram or as a ramdisk. Very safe and Very fast in 16bit mode. 6K of ROM are fixed 2K are banked. In order to use this card as a ramdisk, you must own or purchase copies of ROS8 from either Bud Mills service or OPA. SPVMC: (1999) SPEECH and VOICE-Memory-card. It contains the Speech-Synthesizer-chip (same as in PHP1500) and a full VSM (Voice-memory) emulation with a FLASH-EPROM. This contains all the Data from both of the original PHP1500-Phrase-ROMS PLUS FIFE-additional-VSM's with time/weather/ avionics and so on! One of the VSM is female, all other male voice. You can install the card into the BOX, both, the DSR and the VSM is in-system-Programmable using FLASH-technology. The DSR contains all the ALLPHONES from the TE-II module plus additional software. It is a stand-alone card for the BOX (TI or SGCPU) not an adapter for the PHP1500!!! Note: All cards except for BwG include Flash Memory BIO's for easy updating of DSR Code. ------------------------------------------------------------------------- 2. My GPL BANKS At the main menu: 0=Easy Bug. 1=TI Basic/XB 2=TI Writer 3=E/A Modular 4=GPL Assembler Note: All modules have their support files loaded in GRAM, so after selecting a menu option, no additional disk activity is needed. Note2: This is not the only, or even the "best way" to setup the HSGPL card, I have included it only as reference of how you could, if you wanted to, set things up! ------------------------------------------------------------------------- 3. Calls added by SNUG cards (Short List): CALL EVPC - EVPC will pull up the EVPC (DSR) setup screen with loaders. CALL MEM8 or MEM16 - Memory access. CALL XB16 - Runs XB in full 16 bit mode. FCTN-8 At the main menu will pull up HSGPL loader program. ------------------------------------------------------------------------- 4. The Directory structure of my SCSI Drive: SCS1. DM2K SCS1.SNUG. MDC1@4/1 - Note needs sector edited to load from SCS1. SCS1.FWB. LOAD & FW. Note: This is not the only, or even the "best way" to setup the HSGPL card, I have included it only as reference of how you could, if you wanted to, set things up! ------------------------------------------------------------------------- 5. Bob's CRU Configuration (With comments by Michael Becker). From: BOB CARMANY Subject: Re: CRUs I have just finished re-doing my CRU addresses yet again. Here they are (for the final time I hope!) >1000 Vacant >1100 TI Controller (DSK1-3) >1200 Vacant >1300 RS232/1 RS232/2 PIO >1400 Vacant (reserved for AVPC,EVPC and MECHATRONICS80 column-card) >1500 RS232/3 RS232/4 PIO/2 >1600 Quest 1 (DSK4 & DSK5) >1700 Horizon 1 (DSK8, DSK9, DSKA) (If you have a SCSI card, place it at this CRU address) >1800 Quest 2 (DSK6 & DSK7) >1900 Used by my Eprommer >1A00 Quest 3 (DSKB & DSKC) >1B00 reserved! supported by GPL-interpreter! Do not use any card except: HSGPL * Grom Zero automatically searches for GPL extensions at this CRU address on power up. >1C00 Quest 4 (DSKD &DSKE) >1D00 Vacant >1E00 AMS 1 Meg card >1F00 reserved for P-code-system Not requiring a CRU address: MBP Clock Card and Speech Synthesizer card. Bob ------------------------------------------------------------------------ 6. Essential Software to have for each card. Q:What do you consider ("Essential Software") to go out with each card? A: for HSGPL : DSRLDRD2 or DSRLDRE2 plus HSGPLDS0 to 7 and the "bankxxx" files. plus D80HSGPL,M,N (or E80HSGPL,M,N) ASCSI : DSRLDRD2 or DSRLDRE2 plus DSR1,6-0.......... and all files beginning with SCSI....and the MDC....There is no illegal copied program, so you can post all files with that cards. EVPC : EVPC,D and GIF99 ASCSI : Brad Snyder's Scuzzy (for low level formatting the drive). David Neiter's DM (for high level formatting the drive). Fred G. Kaal's DM2K for file and directory manipulation. The latest version of these three programs should be available from ftp.whtech.com ------------------------------------------------------------------------- 7. Questions pertaining to the ASCSI card: *************** * ASCSI * *************** Q: How different is the SNUG ASCSI from the WHT SCSI controller? a: The card is very similar to the WHT-cards, except the DIP-switch for SCSI-id and GENEVE/TI-mode. This is inverted, because I used the better solution for pull-up. So all SCSI-bits (DIP SW1-3 from block2) are "0" if ON, "1" if OFF. All four switches "OFF" is SCSI-id Nr. 7 (the default for the card itself) and "GENEVE"-mode (the switch no. 4 of block2). DIP-SW1 is for the CRU-adress, which is actual >1700. The last switch (#8) is used for either polling-mode (if ON) or P-DMA-mode (OFF), P-DMA is the fastest way and the default. Q: What is the procedure for getting a SCSI drive going for this card? A: Quick SCSI Instructions: 1. Set Drive to 0. - Responds as SCSI1. 2. Format to 512K Sectors with Brad Snyders SCUZZY. 3. Use David Neiters DM to do a logic format. 4. Use either Multi-Disk Commander (only for 80column-cards!) or DM2K.. A: Long Form: 1. Don't Panic! 2. Install the card and the drive. 3. The first time you use a drive ZIP, Syquest or harddrive you must low level format it. Run SCUZZY from any E/A5-loader. Select the drive you want to format (it is scanned by the program). - Press format drive. - select 512byte-per sector (no other value allowed by the DSR!) - you will be asked for a Password, it is "FORMAT" - after a long time of work, it should be "sucessfully completed". Now the drive is prepared for INITIALIZING! 4. Use any E/A3-loader (sorry, there is no program-file for it!) LOAD and RUN DM12M;O (it will autostart) and select - Drive-functions (ASFAIR) - INITIALIZE you will be asked for the drive number and "are you sure?" continue, the initialize will only take a few seconds. - Exit the program. 5. Use MDC3 if you have 80colum-display or DM2K for 40columns for all file/directory operations. Note: Lookint at the back of my ZIP-drive, my ZIP has a switch for the ID. I can select either ID5 or 6. Since the DSR-names start with 1 and ends with 8 (SCS1 to SCS8) the "drive-number" you may asked for in some programs is one above the real SCSI-ID!!! SCSI-ID is a binary adress, starting with 0 until 7, so you can select your ZIP (if it is similar to mine) between ID-5 (=SCS6) or ID-6 (=SCS7). All right? Please take care what you expect on the screen and what you are asked for in SCSI-programs. SCUZZY scans the SCSI-bus for available devices and shows on the first screen the real SCSI-ID (0..7) with the manufacturer of the drive. But when you FORMAT a drive, you have to press the NUMBER of the DSR-name (SCSx where the x is the number!). BTW: if your ZIP is the only one drive, activate the TERMINATION (it is a second switch at the back end of the drive). More information: Please enjoy the card and drive! We all had these "starting-problems" when we started using SCSI-devices. It is normal, but TI does not allow the use of ZERO, so Dave had to start the DSR-names with SCS1.....! that was the reason! The SCSDM9 is a very old version (very buggy!) of the DM12M;O (it is called because it was made from the code of ..DM9, I called it DM12M(odified);O(bject)code. It is modified with permission from Dave by Wolfgang Bertsch (As you expect when you press FCTN-BACK. BTW: to leave the program you have to press BACK until the modification-message is shown, then FCTN-QUIT is accepted. Otherwise it is disabled. MDC3 is 80 columns. ("C"-program, neeeds CHAR@....from the same drive or must patched inside the program, look for DSKx.CHAR@..) SC-EDI.. is 80columns ("C"-program, as abive CHAR.....) SCUZZY is 40 columns SCSIRUN is 40 columns and may be used to catalog and start program-files from any SCSI-drive. (the only one program with the (..) to go back one folder like in the pc-world.) DSRSCAN, DSR-scanner for subroutines and valid-DSR's. developing tool. Q: What about using an ASCSI with the Geneve? You should set the ASCSI to CRU>1200. SW4 of block 2 should be set toggled from the default TI position. You must use the "Patched" version of MDOS 6.0 This will support P-DMA correctly, with corrected EOP-signal-timing. Q: With the ASCSI can I use the SCSI formatting tools that Mike Maksimik wrote? A: I only know MYS, this is not working. SCUZZY is working well, but I've found no program to initialize the formatted disk on the GENEVE. I was asking for the source of MYS from Tim, but I cannot remember if I ever got it.... otherwise I am sure I had modified it too... ------------------------------------------------------------------------- 8. Questions pertaining to the HSGPL card. ************* * HSGPL * ************* Q: Where can I find the latest (english) translations for the HSGPL manual? A: Alan Bray's website www.bricktop.demon.co.uk/bricktop Q: Can I/How can I setup the HSGPL to act as a super cart without constantly writing to FEEEPROM? A: Super-cart feature is available since GPL2E-MACH. What do you have? I assume GPL2D. This feature was added two month ago. If you have 2E, simply CALL SCON (or SCOFF), then ROM6 will be available as RAM and banked via CRU >08xx like supercart. It is a RAM-feature, so FEPROM's are not accessed. Q: What program is run to bring up the HSGPL loader program? A: The program files starting with E80HSGPL will enable you to load,save, and reload your HSGPL. The copy I got is in english, so it's pretty self-explanitory on how to use it. If you need a copy, I'll send you one. >>>Also FCTN-8 at the main menu will bring up the loader. >>>>>>>>>>>>>>--from the select-menu, not the main-title-screen! MB Q: What program will convert from GramKracker to HSGPL format? A:The module converter came with my HSGPL disk, it's called GKRACK_E, if you need a copy, let me know. Q: How do I select different modules? A: The Grom bases are selected by pressing a number key at the start-up screen. Mine work as 0 through 7. You may also scroll up and down with the cursor-keys! MB Q: What does the HIGH SPEED in HSGPL card refer to? A: This refers to how fast the CPU can access GROM. On a standard console, GROM reads are controlled by the GROM CLOCK signal which runs at 447KiloHertz. CPU ram can be accessed (if zero wait states at 6 clocks from 3MHz) so, GROM reads happen much more quickly! Q: I haven't seen the speed increases in GPL programs I expected from the High Speed GPL card, even though I did a CALL FAST, is that normal? A: You would expect with access being so much quicker, that all GPL programs would run much MUCH faster. The reason that they don't is somewhat a complex answer... The GPL interpreter causes the "slow-down", the steps below, happen EVERYTIME a GPL instruction is executed: 1 fetch GPL-code from any module-GROM. 2 fetch the interpretation code from interpreter-program 3 branch to pointed TMs9900-assembly-code-routine 4 modify pointers, flags, etc. 5 do the GPL-action (i.e. fill screen if FMT-command) 6 modify GROM-adress 7 goto 1 SO as you can see, accessing the GROM for an instruction is a very insignificant part of the whole equation. Is CALL FAST even valid with the new DSR versions? No, it is replaced by CALL SCON/SCOFF (I removed the circuitry and replaced it with SUPERCART. Q: I ran my BBM Basic Bench Mark, which I have ran on a number of different 9900 based machine and didn't see a performance improvement, is there any call I can make to speed things up? A: If you have the SGCPU card AND you have loaded the re-written XB interpreter into ROM6 (built into the second generation CPU card) you can do a CALL XB16, this will enable the internal (16bit!!!) ROM-6 with the built-in XB-interpreter instead of any external ROM-6. Q: Couldn't the GPL interpreter for all GROMS be A: The GPL-interpreter for all GROMS (except XB!) is built inside GROM-0, which is mapped to BYTE >98xx (even!), it will be very slow. BTW: all XB-links to subprograms are made reversal to the TI-BASIC links, to decide whether it is taken from XB or TI-BASIC! Q: If you install the HSGPL card on a TI System, do you remove all the GROMS from inside the console? A: Yes, all real GROM's are removed (it's simple, all are socketed)! Q: In the documentation for the HSGPL card you mention TI-CALC what is it? A: It is very similar to EASY-CALC, which was very common in the past! It is the only one TI-module I know, which uses all 4-banks of ROM-6, 6000,6002,6004 and 6006. It is very, very rare. I own one! Glad to have it! It is a Calculation-database (...EXCEL...). Q: Did you port Winfried Winklers XB3 to the HSGPL card? A: Yes, I think so! Q: 1. Does the HSGPL have a ram chip, or is the ram in the MACH chip? A: --> It has! Press "H" for hardware in the HSGPL-pgm, you will expect the actual configuration: 29C0xx, 621818 or similar. the chips are as follows: 29C512 = 64K*8 FLASH-EPROM (mostly used in DSR-space) 29C010 = 128......(4-bank card) 29C020 = 256K.....(8-bank-card) 29C040 = 512K.....(16bank-Card) 29C04a (cutted....is 29C040A, new rev. of '40) 628128 = 128K*8 static-RAM a 16-bank card has usually: 29C512 for DSR 29C040 for GROM-bank's 0...7) 29C040 for Grom-banks 8...15 628128 for GRAM-banks 0 and 1 (will be remapped into the GROM-space instead of FLASH) 29C040 for ROM6 (4times banked = 32K in sum) for ROM-banks 0..15 628128 for RAM6 (4times banked = 32K in sum) for RAM-banks 0 and 1 (will be remapped into ROM-space ) The ROM6 (RAM6) area is always present with 4 banks (banked with the TI-banking, write to >6000, 6002, 6004 or 6006 to change the bank) The banking maybe changed to semaphore-banking with CALL MBX or with special programs. This is the MBX-banking (write the number 00,01,02 or 03 to >6FFE) plus RAM will be available in the space of 6C00 till 6FFF. The banking maybe changed to Supercart-CRU-banking by CALL SCON, banking is set bit CRU >0802, >0808,>0820 and >0880. In result, every GPL-bank has 32K of ROM6 (banked in any of the described ways). Sorry for the double meaning of "bank". All other known GPL-cards have up to 16 GPL-banks (GROM-Read >9800 till >983C) and only 8K-ROM6 (banked by four = 32K). The HSGPL has 32K (4 times 8K) for EVERY module-bank! Q: What can I do, if Bank0 becomes corrupt and I can't boot? A: There is a trick if you have damaged the first banks: exchange the FLASH-EPROMs which contain the GROMs, so you will exchange banks 8 and 0, 9 and 1 etc..... Then you can start the system and repair the damaged banks, which resist now at the second half (from 8... on 16bank-cards.) TI made a mistake in the ROM-0, some code from GROM-0 is accessed via >9804, the second bank instead of the base-bank, so if you change the GROM-0, do it always in both banks (minimum!), without going through the main-screeen (power-up) between this!!! {otherwise you have to do the procedure as described above...{grin}} Q: How do I clear my GROM and ROM banks to start fresh? A: Load up the HSGPL loader (preferably the july 7, 1999 version) Press "R' to reset the gram banks. Confirm with "Y". Press "B" to load Grom 0 and Basic in the Gram banks. "Y" again. Press "S" for the Save menu. Use a side arrow key to get to bank >10. You should see everything empty except Groms 0, 1, & 2. Make sure the astericks are next to all the Groms & Roms, you'll probably have to press 0,1 & 2, to change those three. Press "F" to enter a filename. Press "S" to save the Bank. Load this saved file in all 16 banks. Everything is now clear, and you'll probably want to load some carts before exiting. Q: I can't get Parsec to run! Will it run on the HSGPL? A: Yes, but only in bank 0 or in the first GRAM bank. It's hard coded to read the speech data from g>9800, even if you don't have a speech synth attached. You probably could sector edit all the >9800's to make it work on the bank you wanted. Other programs that have problems on the HSGPL as well as PC99, because they are hard coded to GROM base zero (9800) are: Buck Rodgers and Face Maker. Q: Personal Record Keeping, Personal Report Generator and Stastics don't seem to work, whats a matter? A: These programs are partially written in BASIC, in order for them to run Basic needs to be loaded.. How do I do this? You don't need to set up a console to save the carts that need TI BASIC. Just use the HSGPL loader to load the cart into a bank that already has TI BASIC, then resave it from the HSGPL loader and include Groms 1&2. --Tony Q: I would like very much to develop some software for the HSGPL card but I need some important information. I have been unable to write to the GRAM pages on the HSGPL card using the standard Gram Writes that work with the PGRAM and GRAM KRACKER. Is this GRAM memory protected and if so, do I need to set a CRU bit or call a DSR routine to un-protect the GRAM memory? I would very much like to converse with Winfred or Harold on this matter, is that possible? Also, any source code to the HSGPL DSR and loader programs would be very valuable to any programming efforts I can make. A: Yes, the HSGPL-software needs some CRU-bit-settings, but you have to divide it into 2 separate parts: - the DSR-part (with DSRldr), I assume Harald will not give the code for it.....(he is very proud about it!) - the "GPL"-part, wich is acessed by GROM-adresses. the asnwer is a very long description, I will do a little bit later (please remind me..) Humm...... okay, I'll sent you a short form of the german manual with english comments:..... CRU-Map: +-----------------------------------------------------------------+ | CRU-bit | name | effect, if bit set | +---------+----------+--------------------------------------------+ | >1B00 | DEN | DSR-area (>4000->5FFF) is enabled | | | | (what else...) | | >1B02 | GRAM_EIN | GRAM-banks for Page 0/1 instead of FEEPROM | | >1B04 | BANK_INH | Paging-disable | | >1B06 | PG0 | LSB for paging the DSR-area | | >1B08 | PG1 | Paging-adress for DSR, 6 bit in sum | | >1B0A | PG2 | equates 64 DSR-Pages | | >1B0C | PG3 | | | >1B0E | PG4 | | | >1B10 | PG5 | MSB for paging the DSR-area | | >1B12 | PG6 | Enable the whole card GROM/ROM, if NOT set,| | | | the card is completely disabled (except the| | | | DSR!). This bit is used by power-up-routine| | | | in TI-consoles, to prevent driving against | | | | plugged-in original modules! The power-up | | | | lookes for external GROM's and ROM6's and | | | | if not found, sets these bit! | | >1B14 | WRITE_EN | Write-enable for all FEEPROM and RAM | | >1B16 | FAST | disable the wait-state-Generator for | | | | versions up to „GPL2D"-MACH, {CALL FAST, | | | | SLOW} enable SUPERCART-RAM in „GPL2E"-MACH | | | | {CALL SCON, SCOFF} | | >1B18 | LED_EN | Front-LED is lightening | | >1B1A | frei | not used | | >1B1C | frei | not used | | >1B1E | RAM_EIN | RAM-banks for Page0/1 instead of FEEPROM | +---------+----------+--------------------------------------------+ Memory-Map: +---------+----------+--------------------------------------------+ | Bereich | Name | Bedeutung | +---------+----------+--------------------------------------------+ | >74000- | DSR | well known! 64times available. | | >75FFF | | | | >76000- | ROM6 | ROM in modul-area, four times banked | | >77FFF | | | | >76000 | [ROM6] | write-adress for banking ROM 6000 | | >76002 | [ROM6] | write-adress for banking ROM 6002 | | >76004 | [ROM6] | write-adress for banking ROM 6004 | | >76006 | [ROM6] | write-adress for banking ROM 6006 | +---------+----------+--------------------------------------------+ GROM-Map: GROM-Data-READ enables automatcally the ROM-banks, that belongs to that page. The Pages >9x40 to >9x7C and >9xC0 are no real GPL-Pages, but Alternativ-Adresses, so that the DSR and ROM6 may be loaded in the same way than GROM's (very tricky ;-))). GROM-Daten-Lese-Adresse === GROM-data-READ-adress GROM-Daten-Schreib-Adresse == GROM-data-Write-adress Bereich === area, space Bedeutung === meaning, function Zusatz === additional function +---------+----------+--------------------------------------------+ |Bereich | Name | Bedeutung | +---------+----------+--------------------------------------------+ | >9800 | GRMRD | GROM-Daten-Lese-Adresse Page 0 | | >98x2 | GRMRA | GROM-Adress-Lese-Adresse | | >9804 | GRMRD | GROM-Daten-Lese-Adresse Page 1 | | >9808 | GRMRD | GROM-Daten-Lese-Adresse Page 2 | | >980C | GRMRD | GROM-Daten-Lese-Adresse Page 3 | | >9810 | GRMRD | GROM-Daten-Lese-Adresse Page 4 | | >9814 | GRMRD | GROM-Daten-Lese-Adresse Page 5 | | >9818 | GRMRD | GROM-Daten-Lese-Adresse Page 6 | | >981C | GRMRD | GROM-Daten-Lese-Adresse Page 7 | | >9820 | GRMRD | GROM-Daten-Lese-Adresse Page 8 | | >9824 | GRMRD | GROM-Daten-Lese-Adresse Page 9 | | >9828 | GRMRD | GROM-Daten-Lese-Adresse Page A | | >982C | GRMRD | GROM-Daten-Lese-Adresse Page B | | >9830 | GRMRD | GROM-Daten-Lese-Adresse Page C | | >9834 | GRMRD | GROM-Daten-Lese-Adresse Page D | | >9838 | GRMRD | GROM-Daten-Lese-Adresse Page E | | >983C | GRMRD | GROM-Daten-Lese-Adresse Page F | | >9840 | GRMRD | GROM-Daten-Lese-Adresse DSR | | >9844 | GRMRD | GROM-Daten-Lese-Adresse DSR | | >9848 | GRMRD | GROM-Daten-Lese-Adresse DSR | | >984C | GRMRD | GROM-Daten-Lese-Adresse DSR | | >9850 | GRMRD | GROM-Daten-Lese-Adresse DSR | | >9854 | GRMRD | GROM-Daten-Lese-Adresse DSR | | >9858 | GRMRD | GROM-Daten-Lese-Adresse DSR | | >985C | GRMRD | GROM-Daten-Lese-Adresse DSR | | >9860 | GRMRD | GROM-Daten-Lese-Adresse ROM6 | | >9864 | GRMRD | GROM-Daten-Lese-Adresse ROM6 | | >9868 | GRMRD | GROM-Daten-Lese-Adresse ROM6 | | >986C | GRMRD | GROM-Daten-Lese-Adresse ROM6 | | >9870 | GRMRD | GROM-Daten-Lese-Adresse ROM6 | | >9874 | GRMRD | GROM-Daten-Lese-Adresse ROM6 | | >9878 | GRMRD | GROM-Daten-Lese-Adresse ROM6 | | >987C | GRMRD | GROM-Daten-Lese-Adresse ROM6 | | >9880 | GRMRD | GROM-Daten-Lese-Zusatz-Adresse für | | | | GRAM-Page 10 | | >9884 | GRMRD | GROM-Daten-Lese-Zusatz-Adresse für | | | | GRAM-Page 11 | | >98C0 | GRMRD | GROM-Daten-Lese-Zusatz-Adresse für | | | | RAM-Page 10 und 11 | +---------+----------+--------------------------------------------+ +---------+----------+--------------------------------------------+ | Bereich | Name | Bedeutung | +---------+----------+--------------------------------------------+ | >9C00 | GRMWD | GROM-Daten-Schreib-Adresse Page 0 | | >9Cx2 | GRMWA | GROM-Adress-Schreib-Adresse | | >9C04 | GRMWD | GROM-Daten-Schreib-Adresse Page 1 | | >9C08 | GRMWD | GROM-Daten-Schreib-Adresse Page 2 | | >9C0C | GRMWD | GROM-Daten-Schreib-Adresse Page 3 | | >9C10 | GRMWD | GROM-Daten-Schreib-Adresse Page 4 | | >9C14 | GRMWD | GROM-Daten-Schreib-Adresse Page 5 | | >9C18 | GRMWD | GROM-Daten-Schreib-Adresse Page 6 | | >9C1C | GRMWD | GROM-Daten-Schreib-Adresse Page 7 | | >9C20 | GRMWD | GROM-Daten-Schreib-Adresse Page 8 | | >9C24 | GRMWD | GROM-Daten-Schreib-Adresse Page 9 | | >9C28 | GRMWD | GROM-Daten-Schreib-Adresse Page A | | >9C2C | GRMWD | GROM-Daten-Schreib-Adresse Page B | | >9C30 | GRMWD | GROM-Daten-Schreib-Adresse Page C | | >9C34 | GRMWD | GROM-Daten-Schreib-Adresse Page D | | >9C38 | GRMWD | GROM-Daten-Schreib-Adresse Page E | | >9C3C | GRMWD | GROM-Daten-Schreib-Adresse Page F | | >9C40 | GRMWD | GROM-Daten-Schreib-Adresse DSR | | >9C44 | GRMWD | GROM-Daten-Schreib-Adresse DSR | | >9C48 | GRMWD | GROM-Daten-Schreib-Adresse DSR | | >9C4C | GRMWD | GROM-Daten-Schreib-Adresse DSR | | >9C50 | GRMWD | GROM-Daten-Schreib-Adresse DSR | | >9C54 | GRMWD | GROM-Daten-Schreib-Adresse DSR | | >9C58 | GRMWD | GROM-Daten-Schreib-Adresse DSR | | >9C5C | GRMWD | GROM-Daten-Schreib-Adresse DSR | | >9C60 | GRMWD | GROM-Daten-Schreib-Adresse ROM6 | | >9C64 | GRMWD | GROM-Daten-Schreib-Adresse ROM6 | | >9C68 | GRMWD | GROM-Daten-Schreib-Adresse ROM6 | | >9C6C | GRMWD | GROM-Daten-Schreib-Adresse ROM6 | | >9C70 | GRMWD | GROM-Daten-Schreib-Adresse ROM6 | | >9C74 | GRMWD | GROM-Daten-Schreib-Adresse ROM6 | | >9C78 | GRMWD | GROM-Daten-Schreib-Adresse ROM6 | | >9C7C | GRMWD | GROM-Daten-Schreib-Adresse ROM6 | | >9C80 | GRMWD | GROM-Daten-Schreib-Zusatz-Adresse für | | | | GRAM-Page 10 | | >9C84 | GRMWD | GROM-Daten-Schreib-Zusatz-Adresse für | | | | GRAM-Page 11 | | >9CC0 | GRMWD | GROM-Daten-Schreib-Zusatz-Adresse für | | | | RAM-Page 10 und 11 | +---------+----------+--------------------------------------------+ Jumper: offen=== open, gesteckt=== closed +-----------+-----------+------------------------+ | Jumper J2 | Jumper J1 | Bedeutung : | +-----------+-----------+------------------------+ | offen | offen | Speichergröße 29C512. | | offen | gesteckt | Speichergröße 29C010. | | gesteckt | offen | Speichergröße 29C020. | | gesteckt | gesteckt | Speichergröße 29C040. | +-----------+-----------+------------------------+ Anhang 2: FLASH-EPROM-Map der DSR: Unter Bemerkungen stehen die alternativen GROM-Ansprech-Adressen! PGx are the paging-bits in CRU! Adresse is the absolute adress in the FLASH (if programmed in a programmer). on the right side are the alternate GPL-adressed where the chip can be acessed too. NOTE: all memories can be acessed over GPL-READ/Write-adresses, the DSR and ROM6 too!!!! very tricky to use ONE type of loader! Ende bei 29C512 means: if only a ‚512 is installed thie size is limited to this point! +---------+----------+--------------------------------------------+ | Adresse | TI99 | PG543210 | Bemerkungen | +---------+----------+--------------------------------------------+ | 00000 | >4000 | 000000 | >9840 >9C40 | | 01FFF | >5FFF | 000000 | | | 02000 | >4000 | 000001 | | | 03FFF | >5FFF | 000001 | | | 04000 | >4000 | 000010 | | | 05FFF | >5FFF | 000010 | | | 06000 | >4000 | 000011 | | | 07FFF | >5FFF | 000011 | | | 08000 | >4000 | 000100 | | | 09FFF | >5FFF | 000100 | | | 0A000 | >4000 | 000101 | | | 0BFFF | >5FFF | 000101 | | | 0C000 | >4000 | 000110 | | | 0DFFF | >5FFF | 000110 | | | 0E000 | >4000 | 000111 | | | 0FFFF | >5FFF | 000111 | Ende bei 29C512 | | 10000 | >4000 | 001000 | >9844 >9C44 | | 11FFF | >5FFF | 001000 | | | 12000 | >4000 | 001001 | | | 13FFF | >5FFF | 001001 | | | 14000 | >4000 | 001010 | | | 15FFF | >5FFF | 001010 | | | 16000 | >4000 | 001011 | | | 17FFF | >5FFF | 001011 | | | 18000 | >4000 | 001100 | | | 19FFF | >5FFF | 001100 | | | 1A000 | >4000 | 001101 | | | 1BFFF | >5FFF | 001101 | | | 1C000 | >4000 | 001110 | | | 1DFFF | >5FFF | 001110 | | | 1E000 | >4000 | 001111 | | | 1FFFF | >5FFF | 001111 | Ende bei 29C010 | +---------+----------+-----------+--------------------------------+ +---------+----------+-----------+--------------------------------+ |Adresse | TI99 | PG543210 | Bemerkung | +---------+----------+-----------+--------------------------------+ | 20000 | >4000 | 010011 | >9848 >9C48 | | 21FFF | >5FFF | 010000 | | | 22000 | >4000 | 010001 | | | 23FFF | >5FFF | 010001 | | | 24000 | >4000 | 010010 | | | 25FFF | >5FFF | 010010 | | | 26000 | >4000 | 010011 | | | 27FFF | >5FFF | 010011 | | | 28000 | >4000 | 010100 | | | 29FFF | >5FFF | 010100 | | | 2A000 | >4000 | 010101 | | | 2BFFF | >5FFF | 010101 | | | 2C000 | >4000 | 010110 | | | 2DFFF | >5FFF | 010110 | | | 2E000 | >4000 | 010111 | | | 2FFFF | >5FFF | 010111 | | | 30000 | >4000 | 011000 | >984C >9C4C | | 31FFF | >5FFF | 011000 | | | 32000 | >4000 | 011001 | | | 33FFF | >5FFF | 011001 | | | 34000 | >4000 | 011010 | | | 35FFF | >5FFF | 011010 | | | 36000 | >4000 | 011011 | | | 37FFF | >5FFF | 011011 | | | 38000 | >4000 | 011100 | | | 39FFF | >5FFF | 011100 | | | 3A000 | >4000 | 011101 | | | 3BFFF | >5FFF | 011101 | | | 3C000 | >4000 | 011110 | | | 3DFFF | >5FFF | 011110 | | | 3E000 | >4000 | 011111 | | | 3FFFF | >5FFF | 011111 | Ende bei 29C020 | +---------+----------+-----------+--------------------------------+ +---------+----------+-----------+--------------------------------+ | Adresse | TI99 | PG543210 | Bemerkungen | +---------+----------+-----------+--------------------------------+ | 40000 | >4000 | 010000 | >9850 >9C50 | | 41FFF | >5FFF | 010000 | | | 42000 | >4000 | 010001 | | | 43FFF | >5FFF | 010001 | | | 44000 | >4000 | 010010 | | | 45FFF | >5FFF | 010010 | | | 46000 | >4000 | 010011 | | | 47FFF | >5FFF | 010011 | | | 48000 | >4000 | 010100 | | | 49FFF | >5FFF | 010100 | | | 4A000 | >4000 | 010101 | | | 4BFFF | >5FFF | 010101 | | | 4C000 | >4000 | 010110 | | | 4DFFF | >5FFF | 010110 | | | 4E000 | >4000 | 010111 | | | 4FFFF | >5FFF | 010111 | | | 50000 | >4000 | 011000 | >9854 >9C54 | | 51FFF | >5FFF | 011000 | | | 52000 | >4000 | 011001 | | | 53FFF | >5FFF | 011001 | | | 54000 | >4000 | 011010 | | | 55FFF | >5FFF | 011010 | | | 56000 | >4000 | 011011 | | | 57FFF | >5FFF | 011011 | | | 58000 | >4000 | 011100 | | | 59FFF | >5FFF | 011100 | | | 5A000 | >4000 | 011101 | | | 5BFFF | >5FFF | 011101 | | | 5C000 | >4000 | 011110 | | | 5DFFF | >5FFF | 011110 | | | 5E000 | >4000 | 011111 | | | 5FFFF | >5FFF | 011111 | | +---------+----------+-----------+--------------------------------+ +---------+----------+-----------+--------------------------------+ | Adresse | TI99 | PG543210 | Bemerkungen | +---------+----------+-----------+--------------------------------+ | 60000 | >4000 | 110000 | >9858 >9C58 | | 61FFF | >5FFF | 110000 | | | 62000 | >4000 | 110001 | | | 63FFF | >5FFF | 110001 | | | 64000 | >4000 | 110010 | | | 65FFF | >5FFF | 110010 | | | 66000 | >4000 | 110011 | | | 67FFF | >5FFF | 110011 | | | 68000 | >4000 | 110100 | | | 69FFF | >5FFF | 110100 | | | 6A000 | >4000 | 110101 | | | 6BFFF | >5FFF | 110101 | | | 6C000 | >4000 | 110110 | | | 6DFFF | >5FFF | 110110 | | | 6E000 | >4000 | 110111 | | | 6FFFF | >5FFF | 110111 | | | 70000 | >4000 | 111000 | >985C >9C5C | | 71FFF | >5FFF | 111000 | | | 72000 | >4000 | 111001 | | | 73FFF | >5FFF | 111001 | | | 74000 | >4000 | 111010 | | | 75FFF | >5FFF | 111010 | | | 76000 | >4000 | 111011 | | | 77FFF | >5FFF | 111011 | | | 78000 | >4000 | 111100 | | | 79FFF | >5FFF | 111100 | | | 7A000 | >4000 | 111101 | | | 7BFFF | >5FFF | 111101 | | | 7C000 | >4000 | 111110 | | | 7DFFF | >5FFF | 111110 | | | 7E000 | >4000 | 111111 | | | 7FFFF | >5FFF | 111111 | Ende bei 29C040 | +---------+----------+-----------+--------------------------------+ FLASH-EPROM-Map des ROM6: Unter Bemerkungen stehen die alternativen GROM-Ansprech-Adressen! +---------+----------+-----------+--------------------------------+ | Adresse | TI99 | Bank | Bemerkungen | +---------+----------+-----------+--------------------------------+ | 00000 | >6000 | >6000 | >9860 >9C60 | | 01FFF | >7FFF | | | | 02000 | >6000 | >6002 | | | 03FFF | >7FFF | | | | 04000 | >6000 | >6004 | | | 05FFF | >7FFF | | | | 06000 | >6000 | >6006 | | | 07FFF | >7FFF | | | | 08000 | >6000 | >6000 | | | 09FFF | >7FFF | | | | 0A000 | >6000 | >6002 | | | 0BFFF | >7FFF | | | | 0C000 | >6000 | >6004 | | | 0DFFF | >7FFF | | | | 0E000 | >6000 | >6006 | | | 0FFFF | >7FFF | | Ende bei 29C512 | | 10000 | >6000 | >6000 | >9864 >9C64 | | 11FFF | >7FFF | | | | 12000 | >6000 | >6002 | | | 13FFF | >7FFF | | | | 14000 | >6000 | >6004 | | | 15FFF | >7FFF | | | | 16000 | >6000 | >6006 | | | 17FFF | >7FFF | | | | 18000 | >6000 | >6000 | | | 19FFF | >7FFF | | | | 1A000 | >6000 | >6002 | | | 1BFFF | >7FFF | | | | 1C000 | >6000 | >6004 | | | 1DFFF | >7FFF | | | | 1E000 | >6000 | >6006 | | | 1FFFF | >7FFF | | Ende bei 29C010 | +---------+----------+-----------+--------------------------------+ +---------+----------+-----------+--------------------------------+ | Adresse | TI99 | Bank | Bemerkungen | +---------+----------+-----------+--------------------------------+ | 20000 | >6000 | >6000 | >9868 >9C68 | | 21FFF | >7FFF | | | | 22000 | >6000 | >6002 | | | 23FFF | >7FFF | | | | 24000 | >6000 | >6004 | | | 25FFF | >7FFF | | | | 26000 | >6000 | >6006 | | | 27FFF | >7FFF | | | | 28000 | >6000 | >6000 | | | 29FFF | >7FFF | | | | 2A000 | >6000 | >6002 | | | 2BFFF | >7FFF | | | | 2C000 | >6000 | >6004 | | | 2DFFF | >7FFF | | | | 2E000 | >6000 | >6006 | | | 2FFFF | >7FFF | | | | 30000 | >6000 | >6000 | >986C >9C6C | | 31FFF | >7FFF | | | | 32000 | >6000 | >6002 | | | 33FFF | >7FFF | | | | 34000 | >6000 | >6004 | | | 35FFF | >7FFF | | | | 36000 | >6000 | >6006 | | | 37FFF | >7FFF | | | | 38000 | >6000 | >6000 | | | 39FFF | >7FFF | | | | 3A000 | >6000 | >6002 | | | 3BFFF | >7FFF | | | | 3C000 | >6000 | >6004 | | | 3DFFF | >7FFF | | | | 3E000 | >6000 | >6006 | | | 3FFFF | >7FFF | | Ende bei 29C020 | +---------+----------+-----------+--------------------------------+ +---------+----------+-----------+--------------------------------+ | Adresse | TI99 | Bank | Bemerkungen | +---------+----------+-----------+--------------------------------+ | 40000 | >6000 | >6000 | >9870 >9C70 | | 41FFF | >7FFF | | | | 42000 | >6000 | >6002 | | | 43FFF | >7FFF | | | | 44000 | >6000 | >6004 | | | 45FFF | >7FFF | | | | 46000 | >6000 | >6006 | | | 47FFF | >7FFF | | | | 48000 | >6000 | >6000 | | | 49FFF | >7FFF | | | | 4A000 | >6000 | >6002 | | | 4BFFF | >7FFF | | | | 4C000 | >6000 | >6004 | | | 4DFFF | >7FFF | | | | 4E000 | >6000 | >6006 | | | 4FFFF | >7FFF | | | | 50000 | >6000 | >6000 | >9874 >9C74 | | 51FFF | >7FFF | | | | 52000 | >6000 | >6002 | | | 53FFF | >7FFF | | | | 54000 | >6000 | >6004 | | | 55FFF | >7FFF | | | | 56000 | >6000 | >6006 | | | 57FFF | >7FFF | | | | 58000 | >6000 | >6000 | | | 59FFF | >7FFF | | | | 5A000 | >6000 | >6002 | | | 5BFFF | >7FFF | | | | 5C000 | >6000 | >6004 | | | 5DFFF | >7FFF | | | | 5E000 | >6000 | >6006 | | | 5FFFF | >7FFF | | | +---------+----------+-----------+--------------------------------+ +---------+----------+-----------+--------------------------------+ | Adresse | TI99 | Bank | Bemerkungen | +---------+----------+-----------+--------------------------------+ | 60000 | >6000 | >6000 | >9878 >9C78 | | 61FFF | >7FFF | | | | 62000 | >6000 | >6002 | | | 63FFF | >7FFF | | | | 64000 | >6000 | >6004 | | | 65FFF | >7FFF | | | | 66000 | >6000 | >6006 | | | 67FFF | >7FFF | | | | 68000 | >6000 | >6000 | | | 69FFF | >7FFF | | | | 6A000 | >6000 | >6002 | | | 6BFFF | >7FFF | | | | 6C000 | >6000 | >6004 | | | 6DFFF | >7FFF | | | | 6E000 | >6000 | >6006 | | | 6FFFF | >7FFF | | | | 70000 | >6000 | >6000 | >987C >9C7C | | 71FFF | >7FFF | | | | 72000 | >6000 | >6002 | | | 73FFF | >7FFF | | | | 74000 | >6000 | >6004 | | | 75FFF | >7FFF | | | | 76000 | >6000 | >6006 | | | 77FFF | >7FFF | | | | 78000 | >6000 | >6000 | | | 79FFF | >7FFF | | | | 7A000 | >6000 | >6002 | | | 7BFFF | >7FFF | | | | 7C000 | >6000 | >6004 | | | 7DFFF | >7FFF | | | | 7E000 | >6000 | >6006 | | | 7FFFF | >7FFF | | Ende bei 29C040 | +---------+----------+-----------+--------------------------------+ RAM-Map des RAM6: Unter Bemerkungen stehen die alternativen GROM-Ansprech-Adressen! +---------+----------+-----------+--------------------------------+ | Adresse | TI99 | Bank | Bemerkungen | +---------+----------+-----------+--------------------------------+ | 00000 | >6000 | >6000 | >98C0 >9CC0 | | 01FFF | >7FFF | | ROM-Bänke der | | 02000 | >6000 | >6002 | Page 10 bzw. 0 | | 03FFF | >7FFF | | | | 04000 | >6000 | >6004 | | | 05FFF | >7FFF | | | | 06000 | >6000 | >6006 | | | 07FFF | >7FFF | | | | 08000 | >6000 | >6000 | ROM-Bänke der | | 09FFF | >7FFF | | Page 11 bzw. 1 | | 0A000 | >6000 | >6002 | | | 0BFFF | >7FFF | | | | 0C000 | >6000 | >6004 | | | 0DFFF | >7FFF | | | | 0E000 | >6000 | >6006 | | | 0FFFF | >7FFF | | | +---------+----------+-----------+--------------------------------+ currently unused and for spare use: +---------+----------+-----------+--------------------------------+ | 10000 | >6000 | >6000 | >98C4 >9CC4 | | 11FFF | >7FFF | | | | 12000 | >6000 | >6002 | | | 13FFF | >7FFF | | | | 14000 | >6000 | >6004 | | | 15FFF | >7FFF | | | | 16000 | >6000 | >6006 | | | 17FFF | >7FFF | | | | 18000 | >6000 | >6000 | | | 19FFF | >7FFF | | | | 1A000 | >6000 | >6002 | | | 1BFFF | >7FFF | | | | 1C000 | >6000 | >6004 | | | 1DFFF | >7FFF | | | | 1E000 | >6000 | >6006 | | | 1FFFF | >7FFF | | Ende bei 551001 | +---------+----------+-----------+--------------------------------+ Ausgabe 19.06.1995 ISSUE 16.06.1999 ----------------------------- Misc. Notes: New (Hidden Command) with DSR version 1.60 CALL MINIMEM - will automatically load the minimem. ---------------------------------------------------------------- 9. Questions Pertaining to SGCPU: *************** * SGCPU * *************** Q: Does anyone know if the SGCPU will work with either the AVPC or PGRAM+ cards? I would be interested in purchasing one, but am reluctant about putting out the cash for the HSGPL and the EVPC cards. A: The SGCPU may work with the AVDP (with the VDP-Interrupt connected to a special BUS-line). I cannot test it here, because I've never seen a DIJIT-card (AVDP) in Germany! The PGRAM+ will not work! Reason is: the PGRAM+ uses like all other GRAM-cards the last real GROM-chip inside the console, the SGCPU is not a console and has no GROM! Remember: all GROM-chips will put the contents of their address-counter on the bus in parallel, if you read the GROM-address, so you need only one. The circuitry, first shown from TI in a sample module (which uses EPROM) from the Netherlands has no own address-counter-read-back, so it needs in minimum one GROM-chip (as an original!). These circuitry was copied by all other vendors for GRAM/GROM/GPL-products like Mechatronik or the PGRAM. The HSGPL is the only one existing GPL-card, which is fully independent from any GROM-chip, it has a back-readable adress-counter with autoincrement inside its MACH-PLD (was hard to design, I am very proud about that feature!). Because of that reason, it makes no use of the READY-Pin and does not stop the console. This is the reason for the name: High-Speed-GPL (HSGPL) In addition: I support 4 ROM-6000 for each(!) GPL-Bank, which will be found from the "review-module-library" or from Winfried Winklers new GROM-0. Next feature: The HSGPL supports MBX-Banking, so you can use it to load MB-modules like "SEWERMANIA" or "Soundtrack-Trolley" or all the other modules TI/MiltonBradlay made for the use with the MBX-system and the TI99/4A! Q: I have a program I have used for years called SCAN, it SCAN's CRU address.. Do all the SNUG cards with DSR's show up? A: --> Please have a look to your alternate account, I'll sent you our DSRSCAN-pgm! From the main-title, press "D" for DSR and run through the CRU's with the arrow-keys. all subpgms's etc will be shown. You may look at the CRU-ID (developed by snug) if present by pressing "C", the CRU-identifier is shown "ASCSI2", HRD16 etc. If present, toggling "C" will toggle between the read CRU-bits and the interpreted type of the card. We use a special CRU-bit-stream on >xx20 to >xx3E to identify our cards. Always starting with >A5xx. Have a look at it, enjoy it! Q: Can I use any diskette controller with the SGCPU card set? A: If you want to use a Corcomp controller, you will need to use the Millers Graphics eproms, since the default Corcomp eproms that take control of the console and not allow the keyboard to full initialize. The PC keyboard because it has its own micro- processor takes longer to initialize than a TI keyboard, which contains all passive components. If you want to use a TI Disk Controller, you have to cut the LOAD-strap inside the TI-controller, because the SGCPU is sensing the LOAD-line of the P-BUS (which the flex-cable for the console does not!). TI supported the LOAD-interrupt by the Controller-hardware, but not by the DSR! They never released a software for it (Guessing: not utilized in software, because the control signal was not passed on to the console) {grin}. [DHE NOTE: This control line is mentioned in passing in the Bunyard manual.] Q: Where is the audio output on the SGCPU? A: SGCPU has no audio out, the audio-chip needs the 447KHz-Clock from the VDP, which is not available on any place near the CPU. So it is placed on the EVPC. I made a miniboard for Tony's AVPC with the Sound-chip too. IT's only a prototype now, but maybe I will make a real pcb. Q: How is a PC AT keyboard used on the SGCPU? The ALT-key (left from space) is always like FCTN (TI), the ALT-GR (right from SPACE) is needed for third-function of keys (ASFAIK only used in european-style keyboards to reach the @ and something more). Both DEL-KEYS have the same function, CTRL-ALT-BREAK (pause) causes a LOAD-Interrupt on TI. CTRL is always CTRL on TI. F1...F10 is FCTN-1 to FCTN-0, ALT-system (print) is like FCTN-= on TO. SHIFT-F1...F10 is same as CTRL-1...0. INS,Del is FCTN-1 FCTN-2 on TI, Page-up/dn is FCTN-4/6 on TI. allright? I tried to implement all keys on every editor available for the TI on such special-keys. I am sorry, there is no BACKspace on the TI, so the cursor only moved one step to the left without rubbing out the char! BTW: ESC is FCTN-9. The NUM-Block on the rigth side remains always in NUM-mode (so we let the LED ligtening....), NUM-key has no effect, but the other keys have! Left ALT is always used as the FCTN-key on TI (may be pressed alone or in combination with any other key.) the right ALT (on european-kb's market with "ALT-GR") is used to reach the third-function of keys (ex: System is ALT-GR AND Print; BREAK is ALT-GR AND Pause), this sounds very irritating, but european kb's have a lot of third functions like the old TI-keyboard, the third function is market on the front of the key or in \ one edge on the top. Ex: to get the @, you have to press SHIFT-2, I have to press ALT-GR (the right-side ALT) and Q!!!! All right? American style kb-layout has nearly no third function except the PRINT/SYSTEM or PAUSE/BREAK-key, we have a lot! Q: I have the hardware reset board on my SGCPU, what key combination triggers it? (Note: This board started out and option, but Michael has since given it to all SGCPU users.) A: CTRL-ALT-DEL {grin} , what else...? Q: Is there any different in SGCPU designed for European vs American Keyboards? A: I love the new one-chip-interface! it is very simple to implement new decoding-software or keyboard-layouts!!! Your chip is marked with "MF2 V1.11 and TABu V1.10; the "u" is US-style. I have "e" for english/UK or "g" for German. Michael Q: What are the latest versions of DSR/MACH chips? A: For EVPC: DSR 4.15 For HSGPL: MACH GPL2E (GPL2D is similar, but without SUPERCART) For BwG: DSR 1.15 and BwG-Pal-1 V4.0 For ASCSI/WHT-SCSI: DSR1.5-0 (released) from Dave or (for test) DSR1.6-0-beta. It is based on DSR1.5, but with a different bank-7 to use the new SuperFast P-DMA-acess which is more than 4-times faster than polling on the TI. Q: What kind of performance boost can I expect from pure assembly programs? A: Bruce Harrison's Calib routine reports back a 140 on a SGCPU system in 16 bit mode. A Stock TI reports back 199. In 8 bit mode the SGCPU reports back a 200. Q: Did you figure out what was causing the timing problems with the keyboard in Lubbock/Do I need an XT or AT keyboard for the SGCPU A: You need a MF2 keyboard for the SGCPU an "AT" kb with the old "big" DIN-connector. All PS/2 kb's are MF2, but please use a kb from a good manufacturer, on FW98 is was no timing problem. The IBM-specification for kb's has 3 different scan-modes for keys: mode-1 (XT-style, unidirectional, mode-2, bidirectional, superset of mode-1 in key-codes, mode-3 bidirectional and a very linear coding table for the keys) We used mode-3, because it is an continuos stream of codes (mode-2 uses a mixture of 8 and 16bit codes...). It has to be supported by all manufacturers, but we found a lot of cheap kb's, which does not or partial support mode-3 (that was the problem). Good results with old COMPAQU and best results with CHERRY-kb's! I bought an cheap kb in England to look at the problems, was the same as in Lubbock! Sorry, I guess, because IBM makes no longer use of mode-3, some Chinese and other cheap manufacturers have removed the code or simply: NOT TESTED! Some kb's seems to support it, but with bugs! That happened in Lubbock. I use a CHERRY G81-3000, which is very good! But it costs 70,- DM! [Compilers Note: I'm using a Microsoft Natural Keyboard with a PS/2 to AT converter, it works great, although it is a bit "un-natural!"] Q: How / Why does AMS emulation differ on the SGCPU VS a "REAL" AMS card. Does the SGCPU use the same memory controller? A: The REAL-AMS is located inside the BOX, on the (multiplexed) 8-bit-Databus. {thinking........;-)} Aha! That may cause the difference: The SGCPU-AMS is a full 16bit-RAM. That is not a big difference in accessing the memory-chips (even if it is much faster!), but in accessing the mapping-registers! These registers (in the REAL-card a '612-chip) are connected on the Databus. Because it uses the P-BOX-bus and A15 is not decoded, you can use word-commands (will be translated to 2-8bit accesses from TI's hardware) to access the registers, they will be accessed twice. So if you write to the first register like MOV xxxx >4000, it is access twice, the last access will remain in the register (even-byte!). Inside the SGCPU I do not have the multiplexed-Datalines, so I had to decide to connect the "register" to the EVEN-bus-lines from the processor (the real-D0..D7). So if your read or compare with word-comands, you will get back data-words with the data in the even byte and than "trash" in the odd byte because of the open odd-datalines! All right? That was the reason, because the first AMStest-Programs does not work with SGCPU. In AMS4SGCPU I have changed all these commands to byte-commands, the it will work with both, the REAL-card AND the SGCPU. Example: MOV >a5a5 @>4010 will write >a5 to >4011 and then to >4010 (odd byte first!). The last (even byte) is valid inside the register, because it is overwritten (is active on 4010 and 4011). MOV @>4010, R1 will produce inside R1 the value >a5a5 if REAL-card, and >a5xx in SGCPU, because the register is NOT active on the odd-bus (there is no second access, it is always ONE 16bit-acess with open high-order-bits!). With byte-acesses, you will be compatible with both cards. BTW: The SGCPU uses a MACH (What else???? {double-grin}) and a small RAM as "register", was much cheaper than the '612 which costs more than 25,- DM in Germany and had a big power-consupmtion. But I am limited to 8bit-expansion (because of the 8bit-data-with of the RAM.) this is no problem, because the AMS uses only 8bit from the 12bit-'612 registers too (there are no more datalines on the Peri-Box-Bus!). So we are limited to 4 additional address-lines (loose 4 for map-register- addressing, get 8 new new ones from each register). This is very difficult to explain, but I hope it is clarified now. Q: How do I hook up a joystick to the SGCPU? A: You will need to build the following adapter. SGCPU TI Joystick DB25 DB9 Signal ------------ ---------------- -------- 19 2 common #2 6 7 common #1 4 3 up 16 8 down 3 9 right 2 5 fire 15 4 left Q: Tony, I'm using your grom 0, how do you turn on 16bit mode if you want it? A: Your program must clear the cru bit at >0F08. Alternatively, you could sector edit the Grom 0 file. Look for >020C >0F08 >1D00 and change the >1D to >1E. You'll also want to change the string "8 BIT RAM ACCESS ENABLED" to all spaces. ---------------------------------------------------------------------------- 10. Questions pertaining to the EVPC Card: *************** * EVPC * *************** Q: Does the EVPC start in interlaced or non-interlaced mode? A: The 9938 is left in non-interlace mode, the only software that triggers interlace mode is GIF99 when the picture is bigger 320*200 pixels. You may configure it with the built-in EVPC-program, which uses the NOVRAM of the board to store the settings (it's a DIP-switch-replacement) Q: What new calls are built in? A: Winfried Winklers version of Easy Bug is built into GROM-0. Pressing 0 for the grom bank will bring it up. [Editors note, this is very hand for diagnosing hardware problems.] Q: How can I pull up the EVPC setup program? A: Call EVPC from basic or xbasic, will bring up the setup for the EVPC card. Q: How can I tell if I have a 6BIT or 8BIT DAC? A: You cannot tell it, it is sensed by the program itself. There is only a small difference. I have only one picture, where you can expect a higher resolution. Q: In assembly language, how do I manipulate the extra colors? A: ???????????????????? Hmmm....I can sent you the manual of the Palette. You have to access the Palete-registers. ------------------------------------------------ 11. Questions pertaining to the HRD-16 card: ****************** * HRD-16 * ****************** Q: There seems to be a HEADER on the HRD-16. What is it for? A: This header will allow you (if you have a SGCPU) to run a ribbon cable between the SGCPU and HRD-16 that will allow data acess to happen over a 16 bit database, instead of the 8 bit data bus built in to the p-box. One word of warning! I've just deleted my ROS and data because I forgot to connect the 16bit-cable on the card before I switched on the Box. This is the only way to produce spurious write-acessed on that card, which will erase your data. This can happen only in 16bit mode (using the SGCPU). Michael P.S: will happen only if you remove the card from the box, relplace it and forget to plug-in the cable. Q: What are the prices for the HRD-16 A: High-Speed-RAM-DSR..... 256K = $100 upgradable to: 512K = $110 upgradable to: 768K = $120 not upgradable except changing ALL RAM's (all from type 128K*8,2,4 or 6) ----------------- 1MB = $130 2MB = $150 3MB = $170 all made with 512K*8-RAM's 1 MB upgradsable to 2MB and 3MB (2,4,or 6 chips) BTW: BwG = $190 (full version, but I am afraid, the GENEVE version is only a few bucks cheaper! PCB is very expensive!) SPVMC (speech and voice-memory-card, maybe used instead of an SPeech Synthesizer, placed in the box) = $170 so far... (PCB is not finished yet) BTW: All with GERMAN manuals only, except the HRD_16 with english-manual from Konstantinos Socas. ---------------------------------------------------------------------- ********************************************************************** 12. Questions pertaining to the BwG Controller: ********************* * BwG * ********************* Q: What does BwG stand for? A: This is the first initial of the last name of the three gentelmen who took part in the development. Michael Becker, Christopher Winters (copy-c) and Harald Glaab. The w is not capitolized because Christopher was suppose to write the DSR, after 2 years of waiting Micahel and Harald decided to use the Atronics DSR. As of 1990 Harald rewrote the DSR! I was told by Michael that Harald uses PC99 to aid in writing of the systems code that he does. Q: (From Bill Sullivan): I finally got around to trying this FDC in my SNUG TI PEB, as I tried to install it in my one Geneve system that has TI PS voltages, but due to the board construction (board material extends equal to edge connector fingers) it would not seat properly. Anyway, I set the dip switches to 1=off, 2=on, 3=on, 4=off which should be correct for two fast (less than 6 ms average access) disk drives with date & time displayed on the main MENU screen. At first I had a 1.2MB (strapped to 720K) & 1.44MB drives installed, and then I changed to two matched DSDD shuggart half-heights, but no matter, the results are always the same for both drives. It cannot fully catalog any diskette with over 201 sectors allocated. "DISK ERROR 21" is the result. If a diskette has less than 203 sectors it will catalog fine whether the diskette is 5.25"/3.5" or in DSK1/DSK2 and formatted SSSD, SSDD, DSSD, or DSDD. I've tried diskettes that have been formatted by the HFDC, Myarc FDC, Corcomp FDC, various original vendor distributions, even diskettes formatted & verified by the GwB FDC itself, and all with the same results! I dug out some very old 5.25" DSDD drives and started giving them a shot, and finally I hit on one that works fair. It isn't consistent, but it catalogs over 1200 sectors, formats and some programs can be "run" from it. Catalogs still produce a fair amount of garbage on screen. Mostly for the "File Type" information and the amount of garbage varies with different diskettes. Yet when I simply replace the GwB FDC with the Myarc FDC (after switching it from 80 to 40 track) everything works the way it is suppose to. Even the diskette that was formatted by the BwG FDC. No garbage on the catalog screen. All programs "run" or execute normally. I've gone as far as I can go with this FDC since I can't try it in the Geneve as previously explained. There are a couple of other strapping options on the board, but neither of the German manuals refer to them, but J1 has a strap on the "a" pins and J2 has the strap on the "b" pins. The chip between J1 & J2 is labled: BwG V4.0/8.1.1999 The EPROM is labled: BwG-DSR 4 V 1.15 hg 21.02.1999 The voltage regulator does get very hot, and the label is discolored. There are some missing components in the area below J1 near the bottom of the board, and in an area just a little above the regulator. Might this be a Geneve only unit? I hope one of you can provide me with some useful help with this BwG FDC. A: The BwG is not designed to work with other sizes as single or double density. No 1,2, no 1,44MB. There is a different type of initializing for HD-disks which the WD1773 cannot handle. (higher spindle rotation and higher bit-rate). If you need the BwG as a replacement for a CORCOMP, I can sent you a "CORCOMP"-PAL and EPROM (take care of the licensing..) The jumpers are okay for BwG-DSR (made by Harald Glaab (hg)) You may also use the old ATRONIC-DSR with another PAL (also available), which is also mostly compatible with CORCOMP. The blank fields on the board are okay, these part where never used and moved away in the last batch of cards (you have one of the latest). Very hot regulator????? Are you sure? should not be above 60 degrees C. Michael Q: What clock is the BwG clock compatible with? A: The BwG-clock is a subroutine in the DSR wich is CC-TT-compatible. In case anyone will access the CCTT-clock directly (well knowing the memory-adresse..) it will not work, only the DSR is compatible, because we used another clock-chip. It is the same MM58274 as inside the GENEVE. Q: Is the time and date stamping function of the BwG compatible with geneve time and date stamping? What about the HFDC's time and date stamping? A: Yes! The Geneve and HFDC stamp files with the time and date the same way. Q: When does time and date stamping happen? Creation? Modification? A: Both, but only if the real DSR-subroutines are used! It will not work with DM-1000 because the access is done sometimes directly. Myarc DM-III also access the DSR very seldom or at all. ---------------------------------------------------------------------- ********************************************************************** 13. Questions pertaining to the SPVMC: ******************* * SPVMC * ******************* Q: Okay sports fans I ran Bruce Harrison's BINGO on the snug system. Everything worked as it should until the speech kicked in. The voice is the same male voice you hear in many of the TI games (likewise the woman's voice). The first problem comes when the program calls any "B" numbers. What happens is the "B" gets spoken in the "robot" voice and the number(s) gets spoken in the male voice. The rest of the letters and numbers are spoken in the male voice but there is a "whistle" in the mix. Sort of like the TI has a bad fitting set of dentures. ;-)))) Any ideas Michael, Bruce? A: AS I said, the speech of the SPVMC is only 95 percent compatible to TI's PHP1300: Some reasons, maybe interesting fact for all members of the list-serve): - TI did use an prototype chip of the later TMS5200, called the TMC 0285, marked with CD2501....(the hell knows why TI used so many internal names at this time)..... - that chip had bugs. - for the TI 99 they corrected the bugs in the LPC-10-decoding of the TMC0285 inside the LPC-code..(!!!). - later the speech-chip became a series product, now named TMS5200, later upgraded to TMS5220, then "A" and "C" (I've never seen an TMS5220B) - these chips do not have bugs and have very good sound for speech, better than the old TMC0285... - but these now official chips have problems with the old ("crocked") LPC-code from the PHP1300 so they produce sometimes "scratches" and "clicks", but only under rare conditions. I am in work to disassemble some "old" LPC-code to look at it, why this happens. Normally one fact is valid: "LPC-10 is LPC-10", so we can use every LPC-10 coded speech, independent from the processor what it was made for. Sorry for some "effects", this is the first time some american users are beta-testers too! so we ALL are learnig how to use speech. Tip: do not forget to select the correct bank before accessing voice-mem: CALL VSM0 (or DELETE VSM0 if in program) for "original" PHP1300 speech-data and ALL MODULES!!!!!! VSM1 for new male-voice and words, but different from the old set of words! VSM2 for female "clock"-voice. :-) Michael from the snug P.S: we are still looking for an programmer who writes us a BASIC program or the algorithm to sort the words in the "XB-order" for the CALL SOUND-program, Harald made it "by-hand" overnight....... not automatical! So if we want to make a new word-set (in case we will find some additionbal words), we have to do the same thing again..... Next wish: a XB-program, which lookes for "CLOCK" (either BwG or Triple-Tech) and speaks the actual time! ;-))) ---------------------------------------------------------------------- ********************************************************************** 14. HSGPL Manual. (Translation by:Ralph Gassmann ) HSGPL SOFTWARE INSTRUCTIONS: These docs have been translated for me (and the non-german speaking TI'ers) by Ralph Gassmann, a Swiss actor who is studying English T.V/Film/Theatre here in England. My wife, Tina, is a lecturer at the college. I can not reproduce the tables here, but I will state when a certain table (list) is referred to. Also the Index is not really needed here. PAGE 3 Operating the HSGPL The program HSGPL is very complex in its function. I suggest therefore, that you read these guidelines at least one time through, even if you think that you are familiar with the TI99/4A. Utilization With this program you are able to manage the content of solid-state modules for the GROM-Port of the TI99/4A in the HSGPL card. Operation The operation of the program is based on simple key combinations, which will be explained in these guidelines later on. How to select a monitor through the main monitor To select an under menu, you have to press the key with the first letter of the functions name. If you haven't pressed the ALPHA-LOCK key, you have to press the command key and the shift key at the same time. How to select a monitor through an under monitor If you are operating on a sub menu, you can select a menu directly by pressing the CTRL key and the particular menu-function-key at the same time. This kind of selecting doesn't work in the RESET mode. Reservations The functions of the software for the HSGPL are only fully usable when: - there is no module plugged into the GROM port or another particular hardware for a module simulation exists (multi-module, super-module etc.). - the range GROM0 ( G >0000 to  G >1FFF ) is activated on the HSGPL. (No more original GROM in the console!). If one of these conditions is omitted, it will cause the deactivation of the particular program function. PAGE 4 An account of functions. Load Loading one or several module files with a modified 4 byte header in the HSGPL card. It is possible, to either put the modules in the FEEPROM for the long term, or for a limited time use, only in the RAM. Save Saves the modules in the HSGPL card onto a disk or a ram-disk. It is also possible to select modules on the GROM-port to load for later use in the HSGPL card. Information See overview diagram of the modules in the HSGPL card. ** see diagram on page 4 ** Reset Deletes ram banks of the HSGPL card. This function hasn't got its own sub menu and can be selected only through the main menu. Hardware Information about the structure of the card. Eventually for detecting defective memory parts of the card. PAGE 5 Functions of the load menu (B) Bank You can select the bank address through the setting BANK, in which you want to load the module. The number of banks depends on the memory equipment of your card. (+) or (>) Bank high With the '+' key, it is possible to select the next higher bank. (-) or (<) Bank lower With the '-' key, it is possible to select the next lower bank. (D) Filename Here you can enter the filename you desire. (L) Load This key starts the loading process. It loads all the files which are connected with each other through the headers. You can see the actual contents of the bank after every file on the right side of the program display. (K) Catalogue You can draw up with this function a listing of the files on your disk or ram disk. ** see diagramm page 5 ** PAGE 6 Functions of the save menu (B) Bank You can select the bank address through the setting BANK, in which you want to load the module. The number of banks depends on the memory equipment of your card. You can also select them one after the other with the + and - or the < and > keys. (+) or (>) bank high With the + key it is possible to select the next higher bank. (-) or (<) bank lower With the - key it is possible to select the next lower bank. (D) Filename Here you can enter the name of your disk file. (S) Save You start the saving process with this key. It saves all parts of the module to a disk or ram disk (all parts with a * before the word). The save function is also used to save modules from the GROM port. (K) Catalogue You can draw up with this function a listing of the files on you disk or ram disk. (0) to (7) You can preselect the GROM parts which are to be saved. (Shift 0) to (Shift 3) Analog to the GROM parts, you can select which banks of the ROM side you want to have saved. ** diagram on page 6. Belegt=used, Leer=empty ** PAGE 7 Functions of the transfer menu (Q) Construct source bank or main/basic bank Direct entering of the bank from which you want to download files. (S) Construct end bank or final/destination bank. Direct entering of the bank into which you want to copy the files. (B) Bank display Switches over the display of the banks contents of source and (destination?) (0) Grom 0 The range Grom 0 (G >000 to G >1FFF) will be copied. (G) Grom 1 - 7 The range Grom1 to Grom7 ( G >2000 to G >FFFF ) will be copied. (R) Rom >6000 All four banks of the range ROM >6000 of the source bank will be copied to the same place in the destination bank. (T) Transfer Starts the copy process. The display of the bank contents switches over automatically to the destination bank. ** diagram page 7......belegt=used.....leer=empty.....quelle=source .....kopieren=copy. PAGE 8 Functions of the information menu (+) or (>) bank high (-) or (<) bank lower ** diagram page 8 ** The left half of the menu By selecting the information menu, all existing Grom and Gram banks will be scanned. The status of them are shown on the left half of the screen. Key explanations (-) empty no usable information found in the particular  memory part. (*) used Files in this particular memory part which cant be further specified. (H) header Found valid header ( >AA ) at the beginning of this memory part. (A) Autostart Found valid header ( >AA ) at the beginning of this particular memory part which allows the automatic start of the program. The right half of the menu The red cursor in the overview display goes from the right to the left if you switch the bank with the keys < and >. You see at the same time a further specification of the particular memory part on the right side of the screen. The setting information is now shown in every detail. In addition, there is shown a link for a program name, if there was one found in a valid header. If several names were found in a memory part, this will be shown through a * before the partname. PAGE 9 Functions of the hardware menu There are no further command keys integrated into this menu. ** diagram page 9 ** The routines, where the shown information comes from, are not test routines. Therefore, the parts shown have been only recognized and not scanned for functions. It is not guaranteed, that the explanations about the available memory parts of partly extended cards are shown correctly. ** kapazitat=capacity...bereich=range.....aktiviert=activated ....banke=banks...** PAGE 10 Functions of the catalogue menu Number of the disk drive You will be asked for the number of the drive after selecting the catalogue  in the LOAD or SAVE menu. You enter it by pressing the keys from 1 to 9 and then ENTER. ** laden=load....speichern=save   ** ** diagram 1 on page 10 ** ** laufwerk=disk drive ** After entering the drive number, the files of the specific data medium ( or carrier ) are shown. ( cursor keys) (FCTN-E, FCTN-S, FCTN-D, FCTN-X) You can save the work of typing by selecting a file through the cursor keys and ENTER. (Proceed) (FCTN-6) If all the files wont fit on the screen, you can see the rest by selecting PROCEED. PAGE 11 (Redo) (FCTN-8) Restarts the entering of the drive number. (Back) (FCTN-9) Cancels the construction of the catalogue. PAGE 12 Header format of the Grxm modules The header used in the HSGPL is a modified 4-byte header, corresponding to the agreements of the Snug ( System 99 user group ), which builds on the header type which came on the market with the first Grom simulators for the Grom port. There is always just one GRxM bank loadable. Structure of the headers ** see diagram page 12 ** Header byte >0 The end address (where  you want to load it in ) of the module will be written through the bytes >0 and >1. But because there is more information in the byte >1, it will not be used for getting addresses and recognized as >00. Therefore, the end address must be a multiple of 256 (>FF ). Header byte >1 This byte contains information about in which part of the memory the first file has to be copied and if there is to be another file loaded. ** see diagram page 12 ** The continue load flag decides if the next file is to be loaded or if it is the last one. The end bank describes the bank of the range ROM >6000, in which the file has to be loaded. The values at the moment are 1 to 4. If these bits are set to 0, then the file will be written in the GRxM part. Header bytes >2 and >3 The size of the file is shown here. The HSGPL operation program doesn't analyze these values. There will be only >2000 byte (8kilobytes) at once copied in the particular end part. Header bytes >4 to >2003 Here are the actual user files. They can express all values between >00 and >FF and are transparently transmitted. PAGE 13 Functions of the HSGPL-DSR Power up In the power up routine, after every start up, reset or restart checked with QUIT, if a module or another GRAM card is connected. If this is the case, the HSGPL card reports up to the range G >000 to G >1FFF ( if the GROM 0 is activated on the card because of the hardware). Sub menus reachable from TI Basic via CALL Call slow Switches on the wait state generator for the GROM access. Should only happen when programs are running too fast. Call fast Switches off the wait state for the GROM access. This happens after every start up and reset. Call gram Shows the GRAM banks 0 and 1 as GROM banks 0 and 1 from the addresses G >9800 and G >9804 ( basic pages ). They will not check if there are any useful files. Eventually you have to proceed to a CALL TIBASIC first. Call grom Switches off the GROM banks o and 1. Call ram6000 Shows the ram range instead of the rom ranges of the basic pages. There is no banking possible, but writing access is allowed. Call rom6000 Cancels  CALL RAM6000. This is set automatically on power up. Call tibasic Both GRAM banks will be loaded with GROM 0 and the TI-BASIC (modified for the 80-bit-card). Eventually, existing programs in banks 0 and 1 will be overwritten. The contents of the memory expansion is destroyed in the range >A000 to >FFFF !!!! Because the banks are loaded with the same files here, the selection REVIEW MODULE LIBRARY is not shown. Call hsgpl Starts the operation program for the HSGPL card. The range >A000 to >FFFF in the memory expansion is overwritten, the BASIC program will eventually be destroyed. Call bank (n) The contents of the bank with the number (n) is loaded into both GRAM banks. You have to make sure that there exists a  GROM 0 and TI BASIC in the source bank, otherwise it causes a breakdown of the system. The valid value range is 0 to 15 ( depending on the size of your HSGPL card). Because only decimal inputs are possible, you have to type in 10 for bank >A, 11 for bank B.....till 15 for bank F. The message REVIEW MODULE LIBRARY is here also suppressed. All settings that were made with CALL SLOW, CALL GRAM and CALL RAM6000 are active until you press the RESET button. A warm start with ALT= (QUIT) doesn't change these settings. ************************************************************************* I have typed this in following the translation almost word for word but it does seem reasonably clear. A word of warning though....the flash eproms (FEEPROMS) have a limited lifespan (about 100,000 loadings), so if you have a supercart etc which uses ram loaded into one of your GROM banks, always move it to the GRAM banks for use. To do this, lets say you have supercart in bank 4 .....in TI BASIC type .... CALL BANK(4) ...when the light on the HSGPL goes out type BYE. This will return you to the title screen. Now press the space bar ( which would normally give you extended basic with the HSGPL ) and you will be in Supercart...which is now in GRAM and GRAM can be loaded/unloaded indefinitely! HSGPL HARDWARE MANUAL ( This translation is more or less 'as is'. I have not really had time to pay any attention to the differences in grammer between English and German. Also that in some cases the translation doesn't make a lot of sense ( but you should be able to work it out for yourself). Ralph, who did the translation, is not a computer person, and I have found that other German speaking people - even native Germans - have trouble with ' technical German'). INTRODUCTION This new card for the TI99/4A is not an ordinary gram card.  The great innovation is that the grom address counters in this card are completely re-readable. This now makes it possible to remove the last original grom from the console and makes it possible to get a higher clock frequency than with the usual 447 KHZ for every module. In the case of the HSGPL, it is the full processor clock frequency of 3MHZ. The achieved speeding up of the grom access is about eight times higher than the usual speed. So all modules run with the full CPU access speed with this card, only through the GPL interpreter in ROM0 still inhibited. Of course, you can switch the speeding up off (as I do it). This card has got all 16 grom banks, each with 8x8 Kb (equal 64K), which are supported by the operating system. In addition, and this is unique, this card has got 4 ROM banks per grom bank. Previous gram or GPL cards have all the disadvantage, that they've got different numbers of grom/gram banks but only two or four ROM banks for all the GPL banks together. Therefore you can load these cards only with one single module with ROM. With the HGPL card you could for example load 16 different ex-basic modules with different ROM banks or with TI calc, the only original TI model with 4 ROM banks and all groms that I know of. So there are no limits. That makes altogether one NB grom and 512KB ROM. Theses memories are so called FLASH-EEPROM. They are programmable on board so you don't need a programmer. The two bottom grom and ROM banks exist also as RAM for quick test and for the modules which are running only on basic page >9800 (unfortunately they exist...) That means 128KB gram with 64KB RAM in addition. There are also up to 512KB DSR-ROM on board, because of the usually installed DSR on such a card (for the programme - algorithm of the FEPROM's for example). They lie on the CRU address >1B00, which is supposed to be for the GPL extensions. This card has got altogether up to 2240KB of memory, which is all usable. The price of this card is about 450 DM. You can't make it cheaper if you want high quality! Mannheim, April 1995 Michael. Selection of the GPL-parts The selection of the maximally (?) 16 different GPL-banks happens through the 16 GROM-read addresses, which are supported by the operating system. They start at >9800 (the so-called basic page) and are incremented by >04. The highest read address is therefore at >983C. Between them are the address read-addresses, of which only >9802 is used. The whole thing exists of course also for the writing of files into a GRAM. In that case, the addresses start at >9C00 and end at >9C3C. Only >9C02 is again used of the addresses between, to write on the GROM address counter. The operating system of the TI99/4A compares the GROM 3 ( G >6000->7FFF ) of the read address >9800 to the one of the read address >9804. The new menu point "REVIEW MODULE LIBRARY" is shown, when a difference is discovered. If you click on it, it shows you the next read address/next module on the next page. If there is no other module found, the process starts again, which is also important because there is no backwards. Despite some small snags, I decided to use this kind of selecting, whilst other cards do their selecting through CRU-bits. The pro of this method is that the whole thing runs without DSR or loader. The operating system finds its own way without any extension software setting CRU bits. Because operate just one button (?), like with Harald Glaab's Multi Module, doesn't work with a P-Box card. I also like to explore hidden functions of the TI. The CRU-address doesn't exist by accident: the GPL-interpreter of the TI99/4A has got some unused op-codes, which switch on a card at >1Bxx and get 3 addresses at >4xxx going. They are thought as an extension of the GPL interpreter, and therefore fit on my card. What better than a card, which functions have only to do with the GPL, to put them on a CRU basis, which DSR-range is anyway used by the GPL interpreter! (?). The DSR-ROM of the HSGPL has got altogether 512 kbytes, thats enough for the extensions of the interpreter. Therefore, GPL-Programmers like Winfried Winkler have nearly 512KB to use. Selection of the ROM6-ranges All of the GROM/GRAM - extensions I know have several GROM-banks (like MECHATRONIC) but almost always only one ROM/RAM at >6xxx, But there exist Modules, which have at least one ROM or sometimes up to four ROM's at >6xxx, in addition to the GROMs. The best example is the TI-CALC - an original TI module with GROMs and four banks at >6000. So the best would be to have four banks at >6xxx per page/site. The HSGPL has it! So how to select the right ROM-page? I found out that of every module, the GROM is read first. This command is decoded on the HSGPL's hardware, and the actual GROM-read-address is "eingelatcht"(?) and thats that. The switching over in the four ROM banks happens as usual through writing on the four switch-over-addresses >6000 - >6006. You can also use this memory part through GROM addresses for programming. See under Inter-system-programming. Selection of the DSR parts The flash EEPROM for the DSR is always of the same type as the other FEPROM. Its real size depends on the extension stage. You have to page it 64 times through the setting of 5 CRU bits. The range from >4000 to >5FFF is linear reachable, without any other traps like with disk-controllers or video cards. You can also use this memory part through GROM addresses for programming. see in-system programming. Incompatibilities Unfortunately, some software developers didn't rely on the recommendations for the TI. For example the TI-WRITER module works without problem on all pages, but the FORMATTER, which is after-loaded from the disk or self-contained, jumps to the main title, if it shall run on a different page basic page than >9800. In this case you can fade in GRAM on the two bottom GPL pages. You have to copy the module and GROM0 into the GRAM before you switch over. This is thought as a possibility to copy incompatible modules to >9800. It can also be used as a normal GRAM. To avoid a permanent switch-over between GROM/GRAM, you can reach the two GRAM banks also without switching over to separate read/write addresses. They are at>98880, 84 and >9C80, 84. They are not checked by the operating system but are also not used. The ROM6 pages alternate at >98C0 and >9CC0. The first four ROM6 pages are at G >0000 to G >7FFF, the four ROM6 banks of the second RAM-bank are at G >8000 to G >FFFF. Because the ROM6 banks of both RAM pages together use only 64kbytes, one single GROM base address was enough in this case. Setting on card jumpers: Not many. The whole card has only two jumpers and one small wire bridge (?). The jumpers are for the setting of the used memory size and are set by us before delivery. You can't check through the software because the GROM0 is turned on before every DSR (?). If you want to use the internal GROM0 or not, if you want to cut the wire bridge or not, is up to you. Something like that doesn't exist for GROM 1&2 (usually combined as TI-BASIC), because a software error has to be repaired anyway for using the 80-bit card. So GROM 1&2 always have to be taken out of the console. The fast access speed can only be achieved if you have taken out the original GROM0 and switched on the GROM0 on the card. [Editors note - Thanks to Jacques here is a more detailed description of the three chips that should be removed, they are socketed and have the following numbers on them CD2155ANL, CD2156NL and CD2157NL they contain GROM0, GROM1 and GROM2.] Otherwise the GROM0 in the console stops automatically through its READY pin. Installation in the box Please try to avoid any static discharge when setting up the two jumpers. No extra cables are needed. You just have to open your console and pull out GROMs 1&2 (or better, all three of them). If you didn't take your sound chip out of it (the console), then you now have the opportunity to put it into the EVPC. Thats that! Extensions This card exists in different sizes. The reason for this is that the memories used are still very expensive,(so called FLASH-EEPROM). They have the advantage that you can delete them electrically. The types on the HSGPL are from the 29Fxxx -/ 29Cxxx family, which can be programmed with only +5 volts. No program machine! This means for the TI user that he doesn't need a delete machine or an EPROM programmer. The EPROM programmer can almost program anyway till 27C512 and how well?- we don't really know.(????). Here, I could use any size without consideration for the programmers. The standard version has got four times 29F010. By the way: 29F is the description in AMD and SGS-Thomson, the firm Atmel calls its FLASH's 29C. Possible combinations The version with 29C512 is for TI users who are on a budget, but want a high quality card There are some more combinations, but these are the best. The prices are in DMarks (March 1995). 4+2 means 4 GROM banks with 64KB and 2 GRAM banks with 64kb each. On top of that are DSR with from 64kb to 512kb in the versions with FLASH-EPROM. The main decoder. The whole decoding, as well as the GROM address counter is located in a programmable Logic-bit ( Type Mach 435). Such a high integration became necessary because the setting, which enables the back reading, couldn't be completely realized. That's why all makers of GROM/GRAM cards, have left an original GROM in the setting. The difficulties start, where the GROM address counter during the GROM-files reading or - writing is counted after every memory access. But in the address reading mode this has always to happen before the actual access. Otherwise there would occur a jump during a transfer from the bottom 8-bit to the high-byte. EXAMPLE: if the meter reading is G >3FFF you would read on the high byte >3F in addition, but on the low byte already >00. Correct would be actually >40 and >00 for G >4000. So that the transfer works and the right page is read, you have to count at the beginning of the first byte! You also must increment only once, no matter how often the address is read! Because the original GROMs give the low bytes only when the high byte was read once, no matter for how long the process goes further. To avoid any risk, I adopted this characteristic (probably a design mistake of the GROM), because I know that there is at least one line in the operation where it reads the address three times instead of two times. For the MACH 435 with altogether 128 macro cells and about 5000 gate equivalents(?), this was no problem, but for a discrete setting I would have needed a "baking tray" to place everything into it. And, in an error case, you can change the programming. New Record: with 84 pins, the MACH becomes the chip with the most pins in the TI99/4A system. Software support At the moment, the card runs completely stand alone with a minimum of DSR. It doesn't need more because it is managed by the operating system. Planned is a loading software, with which you can create your own module, before you program the wanted GROM page. The pro is that you don't have to load and program GROM for each GROM. Usual loaders can only handle blocks of 8kbyte. And you can test in the GRAM first, if the module works or not. (If it is a self-written one). What will definitely come into a DSR is a little CALL: for use when a very high access speed is bad, you can switch it on and off with CALL SLOW or CALL FAST. The DSR now sets only the CRU bits PG6, which gives free the range G >2000 to G >FFFF. The range G >000 to G >1FFF is always free because it doesn't work without GROM0. This bit is only set by the INIT routine, when this is checked, that no BASIC GROMs are in the console and no modules are plugged in. Operating system 99/4A (P) bugs The operating system of the TI99/4A (or P) works as follows: it picks out the GROM3 at >9800, which lies at G >6000 to G >7FFF. It compares this with the GROM content which is readable at >9804. Is this identical (?)/ similar, which is always the case with a normal console because of the decoding of the GROM (>98xx,9Cxx), it stops searching and the message REVIEW MODULE LIBRARY is suppressed. But when there is a difference, this message is shown in the list as the last point. If there is no module found at all, there is only REVIEW MODULE LIBRARY shown. Altogether it looks through 16 pages till there is a module found. There occurs a little mistake in the operating system of the TI99/4A: If a difference is found during the comparison with GROM3, the GROM0 is also read at >9804. This means that there must be at least one GROM0 on page 1. That is why the HSGPL exists also with minimal 2 pages, and that is why the GRAM part has two pages (>9800 and >9804). The other pages can be unused. But when you have a module there, there has to be automatically a GROM0 as well. And on every page there has to be a GROM3 with a valid header, otherwise it doesn't recognize any jumps. That, fortunately is not a disaster because the good modules always use the GROM3. Some games modules don't: ZERO ZAP (only GROM7), HANGMAN (only GROM5) and CONNECT FOUR (only GROM4). They wont be found if they exist on a GPL page because of the missing GROM3. In system programming When the first card was released, we recognized a bad feature of the TMS9900. It cant do a single byte access, nor can it do a single write operation. But both are needed for the programming of the FEPROM. Each operation (programming, delete, verify) is initiated through two commands. First of all, the byte >AA has to be written into the address >5555 of the FEPROM, and then the >55 into the address >2AAA. The third command is writing the code of the wanted operation back to >5555. All three write accesses must happen in a row on this FEPROM. But the TMS9900 always does a read-modify-write, also by using byte commands. The byte is read wordwise, then modified and then written back as a word. But the FEPROM cant cope with that. This is the reason why there are always read and write addresses in the world of TI99, for every critical part. ************************************************************************* The translation of page 9 is missing. I will try to get it translated for when I get the SGCPU docs translated. If you find these docs useful, please send me an e-mail so that I know my typing efforts are not all wasted. (its nice to hear from TI'ers anyway). ------------------------------------------------------------------------- XX. Who is this Michael Becker guy anyway? The following was written by Michael for the TI list server. Hello, a long time ago, a lot of people wrote down their life with the TI. I was very busy at this time, so I start now. I was born in 1962 in Cologne (on the Rhine-river) and after 13 years of school, I started 1982 to study in Mannheim to become an "engineer for electronics" at the old company "BBC" (was Brown, Bovery and Cie, not British broadcasting service!) a very old company from Switzerland, was in Mannheim since 1900. I learned at the locomotive factory and I never left that business. In 1985 my studies where finished, and I've got a job here as an hardware-development-enigneer. In the meantime, I bought my first TI-Console from a sell-out in a city-mall for 299,- DM ($175,-) in 1984. Inside the business was a small user group (of hardware and automation engineers) and because we could not buy anything for the TI, we made it ourselves. The first was a Module-emulation, because you could not buy any module (no X-BASIC!!!!) It was horrible in Germany, in 1984 suddenly no TI equipment was available! After 5 years of support from a few German vendors, the last vendor was gone (ATRONIC) and we started to make a new Disk-Controller, because the ATRONIC-FDC was never on the market. In the meantime the business-user-group was no longer existent, and I became a member of the system 99 user-group (snug). We introduced in 1990 the first batch of BwG-Controllers for the snug, the TI-Club-ERRORFREE, TI-WorkshopWiesbaden, TI-Club Duisburg, Bremen and TI-Club-Berlin. We made in sum 86 pieces (all hand-made!), for our members and for all friends from the above user-groups. In 1994 we made the EVPC, because MECHATRONIC disappeared and no 80column-cards are available. I collected all the spare-parts from MECHATRONIK (for 80col and GRAM) in my cellar. In 1995 I made the HSGPL-card and 1996 the SGCPU. In 1997 the ASCSI and 1998 the HRD16-card. What I have done in the meantime since I have email-acess is well known, I hope. There where a lot of small projects, like 32K16 miniboard, R-SET-miniboard, WHT-SCSI-miniboard and many others. In 1986 I found my wife (she is software-engineer) and since 1989 I have children, 3 daughters now...but very interested in the TI, with own TI and own systems. {good trick! So I can use their rooms for my stuff too...!!!}. I have my own house since 1993 and I have now a real "hobby-room" for my TI in the cellar. In the first time, we made a lot of TI-Treffs in Germany, every year, one in the southern part of Germany (Wiesbaden or Stuttgart) and one in Berlin (every year around the first of may). These where regional meetings and one big meeting happened every year as an international meeting with friends from USA, Belgium, Switzerland, Netherlands and so on. Today it is reduced to a regional meeting in Heppenheim or Birkenau (both are near Mannheim/Heidelberg) and another regional meeting in the near of Stuttgart. Since a few years we made the international meetings in and outside Germany (Wien/austria, Utrecht/Netherlands, Nottingham/england). The TI-Treff in Berlin is never held since a lot of years. The snug is a "closed", it is "frozen" to its state (as is, no new members). The TI-Workshop Wiesbaden is still available, but without meetings (is "sleeping") The only active one except the snug is the TI-CLUB ERRORFREE, and a lot of people from other user-groups are in the TI-C-E. BTW: there is no short-form for this user-group! I am a member of TI-C-ERRORFREE too. I hope you enjoyed the short story about a real TI-enthusiast and hobbyist. One of the greatest things I remember was the visit of Fest-West 1998! Thanks again to Tom Wills and all his friends! It was my longest travel I ever made and the first flight since my honeymoon in 1986.....In the meantime I was two times in england and one time in the Netherlands with the TI. Michael Michael Becker Diedesfelder Str. 12 D-68309 Mannheim Germany -------------------------------------------------------------------------- XX+1. Who is Harald Glaab? Harald is the software mastermind behind the SNUG DSR's and the SNUG DSRLOADER (Amongst other software projects)! [editor] Hi Dan, Here some Informations about me: I'm 35 years old, married, one son (so far), working at Deutsche Telekom (german mayor Phone Company) in servive for Public Telephone exchanges. First TI 99/4a in 1982, assembly language since 1984 I have a complete snug-system (SGCPU,HRD16,HSGPL,BwG,SPVMC,ASCSI,EVPC) and original RS232, I do the most TI-programming on PC with LGMA Crossassembler 2.11 (if anyone have a newer version, i'm interrested) hg http://www.home.t-online.de/~harald.glaab -------------------------------------------------------------------------- Revision History: 06.05.1999 - Initial release - after first pass by Michael Becker. 06.20.1999 - Added ASCSI Question and HSGPL memory map. 06.21.1999 - Added how to get up and going with you ASCSI card in long format, thanks for MB. Added Joystick adapter info - thanks to Tony Knerr. 10.07.1999 - Added - Call Minimem, DMA VS Polled Switch, HSGPL CRU Address, Grom Base Problems, Modifying the Tony Knerr grom 0 for 16-bit mode. 10.15.1999 - Added BwG, SPVMC sections. Added info on using the TI disk controller with SGCPU. Added info on using the BwG in a Geneve system. Added info on whats different between TI Speech and SPVMC. 11.25.1999 - Forgot to update date 10.15.99 - fixed. Added XX+1 section - who is Harald Glaab. 12.19.1999 - Added section on using the ASCSI with a Geneve. 12.31.1999 - Added information on using modules that need basic. Added Harold's web page. 01.02.1999 - Added description of GROM 0,1 and 2 to be pulled. Added questions related to the clock. 05.29.2000 - Added information (Thanks Tony) on how to clear ROM/GROM banks to get a fresh start. 07.09.2000 - Added information about HRD-16+SGCPU - ROS corruption in 16bit mode without cable. -------------------------------------------------------------------------